LM3S5G31 Datasheet, PDF (1110/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Signal Tables
23.2 108-Ball BGA Package Pin Tables
23.2.1 Signals by Pin Number
Table 23-7. Signals by Pin Number
Pin Number
A1
A2
A3
Pin Name
PE6
AIN1
C1o
PWM4
U1CTS
PD7
AIN4
C0o
CCP1
EPI0S30
IDX0
U1DTR
PD6
AIN5
EPI0S29
Fault0
U2Tx
Pin Type
I/O
I
O
O
I
I/O
I
O
I/O
I/O
I
O
I/O
I
I/O
I
O
PE2
I/O
AIN9
I
CCP2
I/O
CCP4
I/O
A4
EPI0S24
I/O
PhA0
I
PhB1
I
SSI1Rx
I
GNDA
-
A5
Buffer Type^a Description
TTL
GPIO port E bit 6.
Analog Analog-to-digital converter input 1.
TTL
Analog comparator 1 output.
TTL
PWM 4. This signal is controlled by PWM Generator 2.
TTL
UART module 1 Clear To Send modem flow control input signal.
TTL
GPIO port D bit 7.
Analog Analog-to-digital converter input 4.
TTL
Analog comparator 0 output.
TTL
Capture/Compare/PWM 1.
TTL
EPI module 0 signal 30.
TTL
QEI module 0 index.
TTL
UART module 1 Data Terminal Ready modem status input signal.
TTL
GPIO port D bit 6.
Analog Analog-to-digital converter input 5.
TTL
EPI module 0 signal 29.
TTL
PWM Fault 0.
TTL
UART module 2 transmit. When in IrDA mode, this signal has IrDA
modulation.
TTL
GPIO port E bit 2.
Analog Analog-to-digital converter input 9.
TTL
Capture/Compare/PWM 2.
TTL
Capture/Compare/PWM 4.
TTL
EPI module 0 signal 24.
TTL
QEI module 0 phase A.
TTL
QEI module 1 phase B.
TTL
SSI module 1 receive.
Power
The ground reference for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from GND to minimize
the electrical noise contained on VDD from affecting the analog
functions.
1110
Texas Instruments-Production Data
July 03, 2014