LM3S5G31 Datasheet, PDF (747/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Stellaris^® LM3S5G31 Microcontroller
Bit/Field
1
0
Name
CTSMIS
RIMIS
Type
RO
RO
Reset
0
0
Description
UART Clear to Send Modem Masked Interrupt Status
Value Description
1 An unmasked interrupt was signaled due to Clear to Send.
0 An interrupt has not occurred or is masked.
This bit is cleared by writing a 1 to the CTSIC bit in the UARTICR
register.
This bit is implemented only on UART1 and is reserved for UART0 and
UART2.
UART Ring Indicator Modem Masked Interrupt Status
Value Description
1 An unmasked interrupt was signaled due to Ring Indicator.
0 An interrupt has not occurred or is masked.
This bit is cleared by writing a 1 to the RIIC bit in the UARTICR register.
This bit is implemented only on UART1 and is reserved for UART0 and
UART2.
July 03, 2014
747
Texas Instruments-Production Data