LM3S5G31 Datasheet, PDF (1085/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Stellaris^® LM3S5G31 Microcontroller
Table 23-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PC0
I/O
TTL
GPIO port C bit 0.
80
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
81
VDD
-
Power Positive supply for I/O and some logic.
82
GND
-
Power Ground reference for logic and I/O pins.
PH3
I/O
TTL
GPIO port H bit 3.
EPI0S0
I/O
TTL
EPI module 0 signal 0.
83
Fault0
I
TTL
PWM Fault 0.
PhB0
I
TTL
QEI module 0 phase B.
PH2
I/O
TTL
GPIO port H bit 2.
C1o
O
TTL
Analog comparator 1 output.
84
EPI0S1
I/O
TTL
EPI module 0 signal 1.
Fault3
I
TTL
PWM Fault 3.
IDX1
I
TTL
QEI module 1 index.
PH1
I/O
TTL
GPIO port H bit 1.
EPI0S7
I/O
TTL
EPI module 0 signal 7.
85
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
PWM5
O
TTL
PWM 5. This signal is controlled by PWM Generator 2.
PH0
I/O
TTL
GPIO port H bit 0.
EPI0S6
I/O
TTL
EPI module 0 signal 6.
86
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
PWM4
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
PJ1
I/O
TTL
GPIO port J bit 1.
EPI0S17
I/O
TTL
EPI module 0 signal 17.
87
I2C1SDA
I/O
OD
I²C module 1 data.
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
VDDC
88
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in Table 25-6 on page 1150 .
PB7
I/O
TTL
GPIO port B bit 7.
89
NMI
I
TTL
Non-maskable interrupt.
July 03, 2014
Texas Instruments-Production Data
1085