LM3S5G31 Datasheet, PDF (7/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Stellaris^® LM3S5G31 Microcontroller
12 Watchdog Timers ................................................................................................. 596
12.1 Block Diagram ............................................................................................................ 597
12.2 Functional Description ................................................................................................. 597
12.2.1 Register Access Timing ............................................................................................... 598
12.3 Initialization and Configuration ..................................................................................... 598
12.4 Register Map .............................................................................................................. 598
12.5 Register Descriptions .................................................................................................. 599
13 Analog-to-Digital Converter (ADC) ..................................................................... 621
13.1 Block Diagram ............................................................................................................ 622
13.2 Signal Description ....................................................................................................... 623
13.3 Functional Description ................................................................................................. 625
13.3.1 Sample Sequencers .................................................................................................... 625
13.3.2 Module Control ............................................................................................................ 626
13.3.3 Hardware Sample Averaging Circuit ............................................................................. 628
13.3.4 Analog-to-Digital Converter .......................................................................................... 629
13.3.5 Differential Sampling ................................................................................................... 633
13.3.6 Internal Temperature Sensor ........................................................................................ 635
13.3.7 Digital Comparator Unit ............................................................................................... 636
13.4 Initialization and Configuration ..................................................................................... 640
13.4.1 Module Initialization ..................................................................................................... 640
13.4.2 Sample Sequencer Configuration ................................................................................. 641
13.5 Register Map .............................................................................................................. 641
13.6 Register Descriptions .................................................................................................. 643
14 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 702
14.1 Block Diagram ............................................................................................................ 703
14.2 Signal Description ....................................................................................................... 703
14.3 Functional Description ................................................................................................. 705
14.3.1 Transmit/Receive Logic ............................................................................................... 705
14.3.2 Baud-Rate Generation ................................................................................................. 706
14.3.3 Data Transmission ...................................................................................................... 707
14.3.4 Serial IR (SIR) ............................................................................................................. 707
14.3.5 ISO 7816 Support ....................................................................................................... 708
14.3.6 Modem Handshake Support ......................................................................................... 708
14.3.7 LIN Support ................................................................................................................ 710
14.3.8 FIFO Operation ........................................................................................................... 711
14.3.9 Interrupts .................................................................................................................... 712
14.3.10 Loopback Operation .................................................................................................... 713
14.3.11 DMA Operation ........................................................................................................... 713
14.4 Initialization and Configuration ..................................................................................... 713
14.5 Register Map .............................................................................................................. 714
14.6 Register Descriptions .................................................................................................. 716
15 Synchronous Serial Interface (SSI) .................................................................... 766
15.1 Block Diagram ............................................................................................................ 767
15.2 Signal Description ....................................................................................................... 767
15.3 Functional Description ................................................................................................. 768
15.3.1 Bit Rate Generation ..................................................................................................... 769
15.3.2 FIFO Operation ........................................................................................................... 769
15.3.3 Interrupts .................................................................................................................... 769
July 03, 2014
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