LM3S5G31 Datasheet, PDF (313/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Stellaris^® LM3S5G31 Microcontroller
7 Internal Memory
The LM3S5G31 microcontroller comes with 64 KB of bit-banded SRAM, internal ROM,and 384 KB
of Flash memory. The Flash memory controller provides a user-friendly interface, making Flash
memory programming a simple task. Flash memory protection can be applied to the Flash memory
on a 2-KB block basis.
7.1 Block Diagram
Figure 7-1 on page 313 illustrates the internal memory blocks and control logic. The dashed boxes
in the figure indicate registers residing in the System Control module.
Figure 7-1. Internal Memory Block Diagram
ROM Control
RMCTL
ROM Array
7.2
Cortex-M3
Icode Bus
Dcode Bus
Flash Control
FMA
FMD
FMC
FCRIS
FCIM
FCMISC
Flash Write Buffer
FMC2
FWBVAL
FWBn
32 words
Flash Array
Bridge
SRAM Array
Flash Protection
FFMMPPRREEn
FFMMPPPPEEn
UFslearshReTgimisitnegrs
UBSUOESORET_CRCREFLGG0
USER_REG1
USER_REG2
USER_REG3
Functional Description
This section describes the functionality of the SRAM, ROM, and Flash memories.
Note: The μDMA controller can transfer data to and from the on-chip SRAM. However, because
the Flash memory and ROM are located on a separate internal bus, it is not possible to
transfer data from the Flash memory or ROM with the μDMA controller.
July 03, 2014
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Texas Instruments-Production Data