LM3S5G31 Datasheet, PDF (604/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Watchdog Timers
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C
This register is the interrupt clear register. A write of any value to this register clears the Watchdog
interrupt and reloads the 32-bit counter from the WDTLOAD register. Value for a read or reset is
indeterminate.
Watchdog Interrupt Clear (WDTICR)
WDT0 base: 0x4000.0000
WDT1 base: 0x4000.1000
Offset 0x00C
Type WO, reset -
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
WDTINTCLR
Type WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Reset
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
WDTINTCLR
Type WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Reset
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bit/Field
31:0
Name
WDTINTCLR
Type
WO
Reset
-
Description
Watchdog Interrupt Clear
604
July 03, 2014
Texas Instruments-Production Data