LM3S5G31 Datasheet, PDF (16/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Table of Contents
Table 8-3.
Table 8-4.
Table 8-5.
Table 8-6.
Table 8-7.
Table 8-8.
Table 8-9.
Table 8-10.
Table 8-11.
Table 8-12.
Table 8-13.
Table 9-1.
Table 9-2.
Table 9-3.
Table 9-4.
Table 9-5.
Table 9-6.
Table 9-7.
Table 9-8.
Table 9-9.
Table 9-10.
Table 9-11.
Table 9-12.
Table 10-1.
Table 10-2.
Table 10-3.
Table 10-4.
Table 10-5.
Table 10-6.
Table 10-7.
Table 10-8.
Table 11-1.
Table 11-2.
Table 11-3.
Table 11-4.
Table 11-5.
Table 11-6.
Table 11-7.
Table 11-8.
Table 11-9.
Table 11-10.
Table 11-11.
Table 12-1.
Table 13-1.
Table 13-2.
Table 13-3.
Table 13-4.
Control Structure Memory Map ........................................................................... 364
Channel Control Structure .................................................................................. 364
μDMA Read Example: 8-Bit Peripheral ................................................................ 373
μDMA Interrupt Assignments .............................................................................. 374
Channel Control Structure Offsets for Channel 30 ................................................ 375
Channel Control Word Configuration for Memory Transfer Example ...................... 375
Channel Control Structure Offsets for Channel 7 .................................................. 376
Channel Control Word Configuration for Peripheral Transmit Example .................. 377
Primary and Alternate Channel Control Structure Offsets for Channel 8 ................. 378
Channel Control Word Configuration for Peripheral Ping-Pong Receive
Example ............................................................................................................ 379
μDMA Register Map .......................................................................................... 381
GPIO Pins With Non-Zero Reset Values .............................................................. 420
GPIO Pins and Alternate Functions (100LQFP) ................................................... 420
GPIO Pins and Alternate Functions (108BGA) ..................................................... 422
GPIO Pad Configuration Examples ..................................................................... 428
GPIO Interrupt Configuration Example ................................................................ 429
GPIO Pins With Non-Zero Reset Values .............................................................. 430
GPIO Register Map ........................................................................................... 430
GPIO Pins With Non-Zero Reset Values .............................................................. 442
GPIO Pins With Non-Zero Reset Values .............................................................. 448
GPIO Pins With Non-Zero Reset Values .............................................................. 450
GPIO Pins With Non-Zero Reset Values .............................................................. 453
GPIO Pins With Non-Zero Reset Values .............................................................. 460
External Peripheral Interface Signals (100LQFP) ................................................. 476
External Peripheral Interface Signals (108BGA) ................................................... 477
EPI SDRAM Signal Connections ......................................................................... 482
Capabilities of Host Bus 8 and Host Bus 16 Modes .............................................. 486
EPI Host-Bus 8 Signal Connections .................................................................... 487
EPI Host-Bus 16 Signal Connections .................................................................. 489
EPI General Purpose Signal Connections ........................................................... 498
External Peripheral Interface (EPI) Register Map ................................................. 504
Available CCP Pins ............................................................................................ 550
General-Purpose Timers Signals (100LQFP) ....................................................... 551
General-Purpose Timers Signals (108BGA) ......................................................... 552
General-Purpose Timer Capabilities .................................................................... 553
Counter Values When the Timer is Enabled in Periodic or One-Shot Modes .......... 554
16-Bit Timer With Prescaler Configurations ......................................................... 555
Counter Values When the Timer is Enabled in RTC Mode .................................... 556
Counter Values When the Timer is Enabled in Input Edge-Count Mode ................. 556
Counter Values When the Timer is Enabled in Input Event-Count Mode ................ 558
Counter Values When the Timer is Enabled in PWM Mode ................................... 559
Timers Register Map .......................................................................................... 564
Watchdog Timers Register Map .......................................................................... 599
ADC Signals (100LQFP) .................................................................................... 623
ADC Signals (108BGA) ...................................................................................... 624
Samples and FIFO Depth of Sequencers ............................................................ 625
Differential Sampling Pairs ................................................................................. 633
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July 03, 2014
Texas Instruments-Production Data