LM3S5G31 Datasheet, PDF (715/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Stellaris^® LM3S5G31 Microcontroller
■ UART1: 0x4000.D000
■ UART2: 0x4000.E000
Note that the UART module clock must be enabled before the registers can be programmed (see
page 264). There must be a delay of 3 system clocks after the UART module clock is enabled before
any UART module registers are accessed.
Note: The UART must be disabled (see the UARTEN bit in the UARTCTL register on page 730)
before any of the control registers are reprogrammed. When the UART is disabled during
a TX or RX operation, the current transaction is completed prior to the UART stopping.
Table 14-4. UART Register Map
Offset Name
Type
0x000 UARTDR
0x004 UARTRSR/UARTECR
0x018 UARTFR
0x020 UARTILPR
0x024 UARTIBRD
0x028 UARTFBRD
0x02C UARTLCRH
0x030 UARTCTL
0x034 UARTIFLS
0x038 UARTIM
0x03C UARTRIS
0x040 UARTMIS
0x044 UARTICR
0x048 UARTDMACTL
0x090 UARTLCTL
0x094 UARTLSS
0x098 UARTLTIM
0xFD0 UARTPeriphID4
0xFD4 UARTPeriphID5
0xFD8 UARTPeriphID6
0xFDC UARTPeriphID7
0xFE0 UARTPeriphID0
0xFE4 UARTPeriphID1
0xFE8 UARTPeriphID2
0xFEC UARTPeriphID3
R/W
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
W1C
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0x0000.0000
0x0000.0000
0x0000.0090
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0300
0x0000.0012
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0060
0x0000.0000
0x0000.0018
0x0000.0001
Description
UART Data
UART Receive Status/Error Clear
UART Flag
UART IrDA Low-Power Register
UART Integer Baud-Rate Divisor
UART Fractional Baud-Rate Divisor
UART Line Control
UART Control
UART Interrupt FIFO Level Select
UART Interrupt Mask
UART Raw Interrupt Status
UART Masked Interrupt Status
UART Interrupt Clear
UART DMA Control
UART LIN Control
UART LIN Snap Shot
UART LIN Timer
UART Peripheral Identification 4
UART Peripheral Identification 5
UART Peripheral Identification 6
UART Peripheral Identification 7
UART Peripheral Identification 0
UART Peripheral Identification 1
UART Peripheral Identification 2
UART Peripheral Identification 3
See
page
717
719
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727
728
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734
736
740
744
748
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754
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761
July 03, 2014
715
Texas Instruments-Production Data