LM3S5G31 Datasheet, PDF (793/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Stellaris^® LM3S5G31 Microcontroller
Bit/Field
0
Name
RORMIS
Type
RO
Reset
0
Description
SSI Receive Overrun Masked Interrupt Status
Value Description
0 An interrupt has not occurred or is masked.
1 An unmasked interrupt was signaled due to the receive FIFO
overflowing.
This bit is cleared when a 1 is written to the RORIC bit in the SSI
Interrupt Clear (SSIICR) register.
July 03, 2014
793
Texas Instruments-Production Data