LM3S5G31 Datasheet, PDF (818/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Inter-Integrated Circuit (I²C) Interface
Figure 16-9. Master TRANSMIT with Repeated START
Idle
Write Slave
Address to
I2CMSA
Write data to
I2CMDR
Sequence
may be
omitted in a
Single Master
system
Read I2CMCS
BUSY bit=0? ^NO
Read I2CMCS
NO _{BUSBSY bit=0?}
YES
Write ---0-011
to I2CMCS
YES
ERROR bit=0? ^NO
YES
Write data to
I2CMDR
Write ---0-001 NO
to I2CMCS
Index=n?
YES
Write ---0-101
to I2CMCS
NO _{ARBLST bit=1?}
YES
Write ---0-100
to I2CMCS
Error Service
Idle
Read I2CMCS
NO _{BUSY bit=0?}
YES
Error Service
NO _{ERROR bit=0?}
YES
Idle
818
July 03, 2014
Texas Instruments-Production Data