C8051F352 Datasheet, PDF (65/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
Table 5.9. ADC0 Fast Filter Flicker-Free (Noise-Free) Resolution¹
in Unipolar Mode (bits)
Decimation ^{Output Word}
PGA Gain Setting
Ratio
Rate²
1
2
4
8
16
32
64
128
1920
10 Hz
16.26 16.11 15.90 15.49 14.95 14.24 13.37 12.32
768
25 Hz
14.37 14.24 13.98 13.64 13.05 12.24 11.34 10.39
640
30 Hz
13.63 13.64 13.57 13.10 12.57 11.82 10.86 9.93
384
50 Hz
11.83 11.93 11.85 11.72 11.32 10.69 9.84 8.93
320
60 Hz
11.11 11.04 11.11 11.00 10.74 10.16 9.36 8.44
192
100 Hz
9.43 9.28 9.40 9.34 9.17 8.86 8.21 7.39
Notes:
1. Flicker-free
(Noise-free)
Resolution
=
log₂
⎛
⎝
-6^F---.-6^u---^l--_×^l--^I--_R-ⁿ---^pM---^u---_S-^t--^R--_N--^a--_o-ⁿ---_i-^g-_s--^ee---⁽⁽--^V-_V----⁾⁾_⎠⎞
where Full Input Range = --------^V----^R---^E---^F--------- in Unipolar mode and RMS Noise is obtained from Table 5.7.
PGA Gain
2. Output Word Rate assuming Modular Clock frequency = 2.4576 MHz (sampling clock frequency = 19.2 kHz)
Rev. 1.1
65