C8051F352 Datasheet, PDF (178/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
Table 20.1. Timer Settings for Standard Baud Rates
Using the Internal Oscillator
Target
Baud Rate
(bps)
230400
115200
57600
28800
14400
9600
2400
1200
Frequency: 24.5 MHz
Baud Rate Oscilla- Timer Clock SCA1–SCA0 T1M* Timer 1
% Error tor Divide Source
(pre-scale
Reload
Factor
select)*
Value (hex)
–0.32%
106
SYSCLK
XX
1
0xCB
–0.32%
212
SYSCLK
XX
1
0x96
0.15%
426
SYSCLK
XX
1
0x2B
–0.32%
848
SYSCLK / 4
01
0
0x96
0.15%
1704 SYSCLK / 12
00
0
0xB9
–0.32%
2544 SYSCLK / 12
00
0
0x96
–0.32%
10176 SYSCLK / 48
10
0
0x96
0.15%
20448 SYSCLK / 48
10
0
0x2B
X = Don’t care
*Note: SCA1–SCA0 and T1M bit definitions can be found in Section 22.1.
Table 20.2. Timer Settings for Standard Baud Rates
Using an External 25.0 MHz Oscillator
Target
Baud Rate
(bps)
230400
115200
57600
28800
14400
9600
2400
1200
57600
28800
14400
Baud Rate
% Error
–0.47%
0.45%
–0.01%
0.45%
–0.01%
0.15%
0.45%
–0.01%
–0.47%
–0.47%
0.45%
Frequency: 25.0 MHz
Oscilla- Timer Clock SCA1–SCA0
tor Divide Source
(pre-scale
Factor
select)*
108
SYSCLK
XX
218
SYSCLK
XX
434
SYSCLK
XX
872
SYSCLK / 4
01
1736 SYSCLK / 4
01
2608 EXTCLK / 8
11
10464 SYSCLK / 48
10
20832 SYSCLK / 48
10
432
EXTCLK / 8
11
864
EXTCLK / 8
11
1744 EXTCLK / 8
11
T1M*
1
1
1
0
0
0
0
0
0
0
0
Timer 1
Reload
Value (hex)
0xCA
0x93
0x27
0x93
0x27
0x5D
0x93
0x27
0xE5
0xCA
0x93
9600
0.15%
2608 EXTCLK / 8
11
0
0x5D
X = Don’t care
*Note: SCA1–SCA0 and T1M bit definitions can be found in Section 22.1.
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Rev. 1.1