C8051F352 Datasheet, PDF (101/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
11.6. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the CIP-51's resources and peripherals. The
CIP-51 duplicates the SFRs found in a typical 8051 implementation as well as implementing additional
SFRs used to configure and access the sub-systems unique to the MCU. This allows the addition of new
functionality while retaining compatibility with the MCS-51™ instruction set. Table 11.1 lists the SFRs
implemented in the CIP-51 System Controller.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, IE, etc.) are bit-addressable
as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied addresses in the SFR
space are reserved for future use. Accessing these areas will have an indeterminate effect and should be
avoided. Refer to the corresponding pages of the datasheet, as indicated in Table 11.2, for a detailed
description of each register.
Table 11.1. Special Function Register (SFR) Memory Map
F8 SPI0CN PCA0L PCA0H ADC0CF ADC0FL ADC0FM ADC0FH VDM0CN
F0
B
P0MDIN P1MDIN ADC0MD ADC0CN
EIP1 ADC0CLK
E8 ADC0STA PCA0CPL0 PCA0CPH0 PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2 RSTSRC
E0 ACC
XBR0
XBR1 PFE0CN IT01CF
EIE1
D8 PCA0CN PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2 IDA1
D0 PSW REF0CN
P0SKIP P1SKIP
IDA1CN
C8 TMR2CN
TMR2RLL TMR2RLH TMR2L TMR2H
C0 SMB0CN SMB0CF SMB0DAT ADC0L ADC0M ADC0H ADC0MUX
B8
IP
IDA0CN ADC0COL ADC0COM ADC0COH ADC0BUF CKMUL ADC0DAC
B0
OSCXCN OSCICN OSCICL
FLSCL FLKEY
A8
IE
CLKSEL EMI0CN ADC0CGL ADC0CGM ADC0CGH
A0 P2
SPI0CFG SPI0CKR SPI0DAT P0MDOUT P1MDOUT P2MDOUT
98 SCON0
SBUF0
ADC0DECL
ADC0DEC
H
CPT0CN
CPT0MD
CPT0MX
90 P1
TMR3CN TMR3RLL TMR3RLH TMR3L TMR3H
IDA0
88 TCON
TMOD
TL0
TL1
TH0
TH1
CKCON PSCTL
80 P0
SP
DPL
DPH
PCON
0(8)
1(9)
2(A)
3(B)
4(C)
5(D)
6(E)
7(F)
(bit
addressable)
Rev. 1.1
101