C8051F352 Datasheet, PDF (191/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
SCK*
MISO
T
MCKH
T
MCKL
T
MIS
T
MIH
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 21.6. SPI Master Timing (CKPHA = 0)
SCK*
MISO
T
MCKH
T
MIS
T
MCKL
T
MIH
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 21.7. SPI Master Timing (CKPHA = 1)
Rev. 1.1
191