C8051F352 Datasheet, PDF (192/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
NSS
T
SE
SCK*
T
CKH
T
CKL
T
SIS
T
SIH
MOSI
MISO
T
SEZ
T
SOH
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 21.8. SPI Slave Timing (CKPHA = 0)
T
SD
T
SDZ
NSS
T
T
T
SE
CKL
SD
SCK*
T
CKH
T
SIS
T
SIH
MOSI
T
SEZ
MISO
T
SOH
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
T
SDZ
Figure 21.9. SPI Slave Timing (CKPHA = 1)
192
Rev. 1.1