C8051F352 Datasheet, PDF (28/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
1.9. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and three 16-bit capture/compare modules. The counter/timer is driven by a programmable timebase that
can select between six sources: system clock, system clock divided by four, system clock divided by
twelve, the external oscillator clock source divided by 8, Timer 0 overflow, or an external clock signal on the
External Clock nput (ECI) input pin.
Each capture/compare module may be configured to operate independently in one of six modes: Edge-
Triggered Capture, Software Timer, High-Speed Output, Frequency Output, 8-Bit PWM, or 16-Bit PWM.
Additionally, PCA Module 2 may be used as a watchdog timer (WDT), and is enabled in this mode follow-
ing a system reset. The PCA Capture/Compare Module I/O and the External Clock Input may be routed to
Port I/O using the digital crossbar.
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8
PCA
CLOCK
MUX
16-Bit Counter/Timer
Capture/Compare
Module 0
Capture/Compare
Module 1
Capture/Compare
Module 2 / WDT
Crossbar
Port I/O
Figure 1.11. PCA Block Diagram
28
Rev. 1.1