C8051F352 Datasheet, PDF (55/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
SFR Definition 5.10. ADC0COH: ADC0 Offset Calibration Register High Byte
R/W
OCAL23
Bit7
R/W
OCAL22
Bit6
R/W
OCAL21
Bit5
R/W
OCAL20
Bit4
R/W
OCAL19
Bit3
R/W
OCAL18
Bit2
R/W
R/W
Reset Value
OCAL17 OCAL16 00000000
Bit1
Bit0
SFR Address: 0xBC
Bits 7–0: OCAL[23:16]: ADC0 Offset Calibration Register High Byte.
This register contains the high byte of the 24-bit ADC Offset Calibration Value.
SFR Definition 5.11. ADC0COM: ADC0 Offset Calibration Register Middle Byte
R/W
OCAL15
Bit7
R/W
OCAL14
Bit6
R/W
OCAL13
Bit5
R/W
OCAL12
Bit4
R/W
OCAL11
Bit3
R/W
OCAL10
Bit2
R/W
OCAL9
Bit1
R/W
Reset Value
OCAL8 00000000
Bit0
SFR Address: 0xBB
Bits 7–0: OCAL[15:8]: ADC0 Offset Calibration Register Middle Byte.
This register contains the middle byte of the 24-bit ADC Offset Calibration Value.
SFR Definition 5.12. ADC0COL: ADC0 Offset Calibration Register Low Byte
R/W
OCAL7
Bit7
R/W
OCAL6
Bit6
R/W
OCAL5
Bit5
R/W
OCAL4
Bit4
R/W
OCAL3
Bit3
R/W
OCAL2
Bit2
R/W
OCAL1
Bit1
R/W
Reset Value
OCAL0 00000000
Bit0
SFR Address: 0xBA
Bits 7–0: OCAL[7:0]: ADC0 Offset Calibration Register Low Byte.
This register contains the low byte of the 24-bit ADC Offset Calibration Value.
Rev. 1.1
55