C8051F352 Datasheet, PDF (48/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
SFR Definition 5.1. ADC0CN: ADC0 Control
R
R
R
R/W
R/W
R/W
R/W
R/W
Reset Value
—
—
— AD0POL AD0BCE
AD0GN
00010000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0xF4
Bits 7–5: Unused: Read = 000b, Write = don’t care.
Bit 4: AD0POL: ADC0 Polarity.
0: ADC operates in Unipolar mode (straight binary result).
1: ADC operates in Bipolar mode (2's compliment result).
Bit 3: AD0BCE: ADC0 Burnout Current Source Enable.
0: ADC Burnout current sources disabled.
1: ADC Burnout current sources enabled.
Bits 2:0 AD0GN: ADC0 Programmable Gain Setting.
000: PGA Gain = 1.
001: PGA Gain = 2.
010: PGA Gain = 4.
011: PGA Gain = 8.
100: PGA Gain = 16.
101: PGA Gain = 32.
110: PGA Gain = 64.
111: PGA Gain = 128.
This SFR can only be modified when ADC0 is in IDLE mode.
48
Rev. 1.1