C8051F352 Datasheet, PDF (139/234 Pages) Silicon Laboratories – 8 k ISP Flash MCU Family

C8051F350/1/2/3
18.1. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 18.3) assigns a priority to each I/O function, starting at the top with
UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that
resource (excluding UART0, which will be assigned to pins P0.4 and P0.5, and the Comparator0 outputs,
which will be assigned to P1.4 and P1.5). If a Port pin is assigned, the Crossbar skips that pin when
assigning the next selected resource. Additionally, the Crossbar will skip Port pins whose associated bits in
the PnSKIP registers are set. The PnSKIP registers allow software to skip Port pins that are to be used for
analog input, dedicated functions, or GPIO.
Important Note on Crossbar Configuration: If a Port pin is claimed by a peripheral without use of the
Crossbar, its corresponding PnSKIP bit should be set. This applies to P0.3 and/or P0.2 for the external
oscillator, P0.6 for the external CNVSTR signal, P1.6 for IDA0, P1.7 for IDA1, and any selected ADC or
comparator inputs. The Crossbar skips selected pins as if they were already assigned, and moves to the
next unassigned pin. Figure 18.3 shows the Crossbar Decoder priority with no Port pins skipped (P0SKIP,
P1SKIP = 0x00); Figure 18.4 shows the Crossbar Decoder priority with the XTAL1 (P0.2) and XTAL2
(P0.3) pins skipped (P0SKIP = 0x0C).
SF Signals
PIN I/O
P0
P1
P2
x1 x2
CNVSTR
IDA0 IDA1
01234567012345670
TX0
RX0
CP0A
CP0
SCK
MISO
MOSI
NSS*
(*4-Wire SPI Only)
SDA
SCL
/SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
0000000000000000
P0SKIP[0:7]
P1SKIP[0:7]
SF Signals
Port pin potentially assignable to peripheral
Special Function Signals are not assigned by the crossbar.
When these signals are enabled, the CrossBar must be
manually configured to skip their corresponding port pins.
Figure 18.3. Crossbar Priority Decoder with No Pins Skipped
Rev. 1.1
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