K5N1229ACD-BQ12 Datasheet, PDF (98/128 Pages) Samsung semiconductor – 512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash

datasheet K5N1229ACD-BQ12
Rev. 1.0
MCP Memory
6.13 Software Access
Software access of the registers uses a sequence of asynchronous READ and asynchronous WRITE operations. The contents of the configuration regis-
ters can be modified and all registers can be read using the software sequence. The configuration registers are loaded using a four-step sequence con-
sisting of two asynchronous READ operations followed by two asynchronous WRITE operations. The read sequence is virtually identical except that an
asynchronous READ is performed during the fourth operation. The address used during all READ and WRITE operations is the highest address of the
device being accessed (3FFFFF); the contents of this address are not changed by using this sequence. The data value presented during the third opera-
tion (WRITE) in the sequence defines whether the BCR, RCR, or the DIDR is to be accessed. If the data is 0000h, the sequence will access the RCR; if
the data is 0001h, the sequence will access the BCR; if the data is 0002h, the sequence will access the DIDR. During the fourth operation, A/DQ[15:0]
transfer data in to or out of bits 15–0 of the registers. The use of the software sequence does not affect the ability to perform the standard (CRE-con-
trolled) method of loading the configuration registers. However, the software nature of this access mechanism eliminates the need for CRE. If the software
mechanism is used, CRE can simply be tied to VSS. The port line often used for CRE control purposes is no longer required.
READ
READ
WRITE
WRITE
CS
OE
tBSA
tBHA
WE
LB/UB
ADV
A/DQ[15:0]
ADDRESS
(max)
XXXX
ADDRESS
(max)
XXXX
ADDRESS
(max)
ADDRESS CR VALID
(max)
IN
RCR: 0000h
BCR: 0001h
Figure 8. Load Configuration Register
Don’t Care
NOTE :
1) /WE should be deasserted before /CS deasserting.
READ
READ
WRITE
READ
CS
OE
WE
LB/UB
ADV
A/DQ[15:0]
ADDRESS
(max)
XXXX
ADDRESS
(max)
XXXX
ADDRESS
(max)
ADDRESS CR VALID
(max) OUT
RCR: 0000h
BCR: 0001h
DIDR: 0002h
Figure 9. Read Configuration Register
Don’t Care
NOTE :
1) /WE should be deasserted before /CS deasserting.
2) ALL Write Operation have tBSA, tBHA.
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