K5N1229ACD-BQ12 Datasheet, PDF (114/128 Pages) Samsung semiconductor – 512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash

datasheet K5N1229ACD-BQ12
Rev. 1.0
MCP Memory
11.9 Single-Access Burst READ Operation—Fixed Latency
VIH
CLK _VIL
VIH
ADV
VIL
A[22:16] ^VIH
VIL
VIH
CS _VIL
VIH
OE
VIL
VIH
WE
VIL
VIH
LB/UB
VIL
VOH
WAIT
VOL
A/DQ[15:0] ^VIH
VIL
tSP tHD
tAHCR
tSP tHD
Valid Address
tCSP
tAVH
tSP tHD
tSP
tCSW
High-Z
tSP
tHD
Valid Address
tCLK
tHD tHZ
tADVO
tBOE
tOLZ
tOHZ
tHD
tKHTL
High-Z
tACLK
tKOH
Valid Output
READ Burst Identified
(WE = HIGH)
Don’t Care
NOTE :
1) Non-default BCR settings: Fixed latency; latency code four (five clocks); WAIT active LOW; WAIT asserted during delay.
2) Don’t care must be in VIL or VIH.
Undefined
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