K5N1229ACD-BQ12 Datasheet, PDF (11/128 Pages) Samsung semiconductor – 512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash

datasheet K5N1229ACD-BQ12
1.0 FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
Vpp
CLK
CE
OE
WE
WP
RESET
RDY
AVD
A16~A24
A/DQ0~
A/DQ15
Bank 0
Address
X
Bank 0
Dec
Cell Array
Y Dec
I/O
Interface
&
Bank
Control
Bank 1
Address
Bank 15
Address
Y Dec
X
Bank 1
Dec
Cell Array
X
Bank 15
Dec
Cell Array
Y Dec
Block
Inform
Erase
Control
Program
Control
Rev. 1.0
MCP Memory
Latch &
Control
Latch &
Control
Latch &
Control
High
Voltage
Gen.
[Table 1] PRODUCT LINE-UP
Mode
Speed Option
VCC=1.7V
-1.95V
Synchronous/Burst
Asynchronous
Max. Initial Access Time (tIAA, ns)
Max. Burst Access Time (tBA, ns)
Max. Access Time (tAA, ns)
Max. CE Access Time (tCE, ns)
Max. OE Access Time (tOE, ns)
1C
(66MHz)
95
11
100
100
15
1D
(83MHz)
95
9
100
100
15
1E
(108MHz)
95
7
100
100
15
1F
(133MHz)
95
6
100
100
15
- 11 -