K5N1229ACD-BQ12 Datasheet, PDF (104/128 Pages) Samsung semiconductor – 512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash

datasheet K5N1229ACD-BQ12
Rev. 1.0
MCP Memory
10.0 TIMING REQUIREMENTS
10.1 Asynchronous READ Cycle Timing Requirements
Parameter
Symbol
Min
Max
Address access time
t_AA
70
ADV access time
t_AADV
70
Address setup to ADV HIGH
t_AVS
5
Address hold from ADV HIGH
t_AVH
2
LB/UB access time
t_BA
70
LB/UB disable to DQ High-Z output
t_BHZ
8
Maximum CS Pulse Width
t_CSM
2.5
CS or ADV LOW to WAIT valid
t_CSW
1
7.5
CS HIGH between subsequent Async Operations
t_CPH
15
Chip select access time
t_CO
70
CS LOW to ADV HIGH
t_CVS
7
Chip disable to DQ and WAIT High-Z output
t_HZ
8
Output enable to valid output
t_OE
20
Output disable to DQ High-Z output
t_OHZ
8
Output ebable to Low-Z output
t_OLZ
5
READ cycle time
t_RC
80
ADV pulse width LOW
t_VP
5
10.2 Asynchronous WRITE Cycle Timing Requirements
Parameter
Symbol
Min
Address setup to ADV going HIGH
t_AVS
5
Address hold from ADV HIGH
t_AVH
2
Address valid to end of WRITE
t_AW
70
LB/UB select to end of WRITE
t_BW
70
CS HIGH between subsequent async operations
t_CPH
15
CS LOW to ADV HIGH
t_CVS
7
Chip enable to end of WRITE
t_CW
70
Data HOLD from WRITE time
t_DH
0
Data WRITE setup time
t_DW
20
Chip disable to WAIT High-Z output
t_HZ
End WRITE to Low-Z output
t_OW
5
ADV pulse width
t_VP
5
ADV setup to end of WRITE
t_VS
70
WRITE to DQ High-Z output
t_WHZ
CS or ADV LOW to WAIT valid
t_CSW
1
WRITE pulse width
t_WP
55
WRITE recovery time
t_WR
0
/UB, /LB valid or mask setup time to beginning of write
t_BSA
0
/UB, /LB valid or mask hold time to end of write
t_BHA
0
Address Skew
t_SKEW
-
NOTE :
1) The High-Z timings measure a 100mV transition from either VOH or VOL toward VCCQ/2.
2) The Low-Z timings measure a 100mV transition away from the High-Z (VCCQ/2) level toward either VOH or VOL.
3) WE LOW time must be limited to tCSM (2.5µs).
4) A refresh opportunity must be provided every tCSM. CS must not remain LOW longer than tCSM.
Max
8
8
7.5
-
-
10
Unit
Notes
ns
ns
ns
ns
ns
ns
1
us
4
ns
ns
4
ns
ns
ns
1
ns
ns
1
ns
2
ns
ns
Unit
Notes
ns
ns
ns
ns
ns
1
ns
2
ns
3
ns
ns
ns
ns
2
ns
ns
ns
2
ns
ns
3
ns
ns
ns
ns
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