K5N1229ACD-BQ12 Datasheet, PDF (49/128 Pages) Samsung semiconductor – 512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash

datasheet K5N1229ACD-BQ12
Rev. 1.0
MCP Memory
Case3 : Start from "16N+4" address group
14th rising edge CLK
CR setting : A14=1, A13=0, A12=1, A11=0
A16-A24
Aa
A/DQ0:
Aa
A/DQ15
CLK
00
AVD
0E
0F
10
11
12
13
0E
0F
10
11
12
13
14
Additional 2 Cycle for First Word Boundary
CE
tCEZ
OE
tOER
tOEZ
RDY
Case 4 : Start from "16N+15" address group
14th rising edge CLK
CR setting : A14=1, A13=0, A12=1, A11=0
A16-A24
Aa
A/DQ0:
Aa
A/DQ15
CLK
00
AVD
3F
3F
10
CE
OE
tOER
RDY
10
11
11
12
Additional 13 Cycle for First Word Boundary
NOTE :
1) Address boundary occurs every 16 words beginning at address 000000FH , 000001FH , 000002FH , etc.
2) Address 000000H is also a boundary crossing.
3) No additional clock cycles are needed except for 1st boundary crossing.
Figure 21. Crossing of first word boundary in burst read mode.
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