K5N1229ACD-BQ12 Datasheet, PDF (117/128 Pages) Samsung semiconductor – 512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash

datasheet K5N1229ACD-BQ12
Rev. 1.0
MCP Memory
11.12 READ Burst Suspend
VIH
CLK _VIL
VIH
ADV _VIL
VIH
A[22:16] _VIL
VIH
CS _VIL
VIH
OE
VIL
VIH
WE
VIL
VIH
LB/UB
VIL
VOH
WAIT
VOL
VIH
A/DQ[15:0]
VIL
tCLK
tSP tHD
tADVO
tAHCR
tSP ^tHD
Valid
Address
tCSP
tCSM
tSP tHD
tOHZ
tCSW
High-Z
tBOE
tOLZ
tSP tHD
Valid
Address
tKOH
Valid
Output
Valid
Output
Valid
Output
Valid
Output
tACLK
NOTE 2
NOTE 3
tHZ
tOHZ
Valid
Address
tOLZ
High-Z
tBOE
Valid
Output
Valid
Output
tCSW
Valid
Address
Don’t Care
Undefined
NOTE :
1) Non-default BCR settings for READ burst suspend: Fixed or variable latency; latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
2) CLK can be stopped LOW or HIGH, but must be static, with no LOW-to-HIGH transitions during burst suspend.
3) OE can stay LOW during burst suspend. If OE is LOW, A/DQ[15:0] will continue to output valid data.
4) Don’t care must be in VIL or VIH.
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