K5N1229ACD-BQ12 Datasheet, PDF (89/128 Pages) Samsung semiconductor – 512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash

datasheet K5N1229ACD-BQ12
Rev. 1.0
MCP Memory
5.0 DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min Typ
Input Leakage Current
I_LI V_IN=V_SS to V_CCQ
-2
-
Output Leakage Current
I_LO CS=V_IH, CRE=V_IL, OE=V_IH or WE=V_IL, V_IO=V_SS to V_CCQ
-5
-
Average Operating Current (Async)
I_CC2 ⁶⁾
Cycle time=min t_RC/min t_WC, I_IO=0mA⁴⁾, 100% duty, CS=V_IL,
CRE=V_IL, V_IN=V_IL or V_IH
-
-
I_CC3I
-
-
108Mhz I_CC3R
-
-
I_CC3W
-
-
Average Operating
Current (Burst)
80Mhz
I_CC3I
I_CC3R
I_CC3W
V_IN = V_CCQ or 0V
CS=V_IL, I_IO=0mA⁴⁾
-
-
-
-
-
-
I_CC3I
-
-
66Mhz I_CC3R
-
-
I_CC3W
-
-
Output Low Voltage
V_OL I_OL=0.2mA
-
-
Output High Voltage
V_OH I_OH=-0.2mA
0.8xV_CCQ -
Standby Current(CMOS)
I_SB11)
CS and ADV=V_CCQ, CRE=0V, Other
inputs=0V or V_CCQ
(Toggle is not allowed) ⁵⁾
< 40°C
< 85°C
-
-
-
-
1/2 Block
-
-
Partial Refresh Current
< 40°C 1/4 Block
-
-
I_SBP ²⁾
CS and ADV=V_CCQ, CRE=0V, Other
inputs=0V or V_CCQ
(Toggle is not allowed) ⁵⁾
1/8 Block
-
-
1/2 Block
-
-
< 85°C 1/4 Block
-
-
1/8 Block
-
-
NOTE :
1) ISB1 is measured after 500ms after CS high. CLK should be fixed at high or at Low.
2) Full Array Partial Refresh Current(ISBP) is same as Standby Current(ISB1).
3) Internal TCSR (Temperature Compensated Self Refresh) is used to optimize refresh cycle below 40°C.
4) IIO=0mA; This parameter is specified with the outputs disabled to avoid external loading effects.
5) VIN=0V; all inputs should not be toggle.
6) This parameter is for page disable mode, Clock should not be inserted between ADV low and WE low during Write operation.
Max Unit
2
μA
5
μA
30 mA
30 mA
40 mA
35 mA
30 mA
40 mA
35 mA
30 mA
40 mA
35 mA
0.2
V
-
V
160 μA
200 μA
150
140 μA
130
180
175 μA
170
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