K5N1229ACD-BQ12 Datasheet, PDF (113/128 Pages) Samsung semiconductor – 512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash

datasheet K5N1229ACD-BQ12
11.8 4-Word Burst READ Operation—Variable Latency
Rev. 1.0
MCP Memory
VIH
CLK
VIL
VIH
ADV
VIL
VIH
A[22:16]
VIL
VIH
LB/UB
VIL
VIH
CS
VIL
VIH
OE
VIL
VIH
WE
VIL
VOH
WAIT
VOL
VIH
A/DQ[15:0]
VIL
tCLK
tSP tHD
tKHKL
tKP tKP
tSP tHD
Valid Address
tAVH
tSP
tAHCR
tCSP
tCSM
tADVO tBOE
tSP tHD
tKHTL
tHD
tHD _tCBPH
tHZ
tOHZ
tCSW
tSP
tHD
Valid Address
tACLK
tKOH
VOH
Valid Valid Valid Valid
VOL
Output Output Output Output
High-Z
High-Z
READ Burst Identified
(WE = HIGH)
NOTE :
1) Non-default BCR settings: Latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
2) Don’t care must be in VIL or VIH.
Don’t Care
Undefined
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