M16C28 Datasheet, PDF (94/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
9. Interrupts
Interrupt Request Cause Select Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IFSR
Address
035F16
After Reset
0016
Bit Symbol
Bit Name
Function
RW
IFSR0
INT0 interrupt polarity
switching bit
0 : One edge
1 : Both edges (1)
RW
IFSR1 INT1 interrupt polarity
0 : One edge
switching bit
1 : Both edges (1)
RW
IFSR2 INT2 interrupt polarity
0 : One edge
switching bit
1 : Both edges (1)
RW
IFSR3 INT3 interrupt polarity
0 : One edge
switching bit
1 : Both edges ⁽¹⁾
RW
IFSR4 INT4 interrupt polarity
0 : One edge
switching bit
1 : Both edges (1)
RW
IFSR5 INT5 interrupt polarity
0 : One edge
switching bit
1 : Both edges ⁽¹⁾
RW
IFSR6
Interrupt request cause
select bit
0 : SI/O3 ₍₂₎
1 : INT4
RW
IFSR7
Interrupt request cause
select bit
0 : SI/O4 (2)
1 : INT5
RW
NOTES:
1. When setting this bit to “1” (both edges), make sure the POL bit in the INT0IC to INT5IC registers
is set to “0” (falling edge).
2. When setting this bit to “0” (SI/O3, SI/O4), make sure the POL bit in the S3IC and S4IC registers
is set to “0” (falling edge).
Interrupt Request Cause Select Register 2
b7 b6 b5 b4 b3 b2 b1 b0
1
Symbol
IFSR2A
Address
035E16
After Reset
00XXXXX0 2
Bit Symbol
Bit Name
Function
RW
IFSR20
(1)
Reserved bit
Set to “1”
RW
(b5-b1)
Nothing is assigned. When write, set to “0”.
When read, the contents are indeterminate
IFSR26
Interrupt request cause
select bit
0 : IC/OC base timer
1 : SCL/SDA
RW
IFSR27
Interrupt request cause
select bit
0 : IC/OC interrupt 1
1 : I²C bus interface
RW
NOTE:
1. Set this bit to "1" befor you enable interrupt after resetting.
Figure 9.4 IFSR Register and IFSR2A Register
Rev. 2.00 Jan. 31, 2007 ^{page 74} of 385
REJ09B0047-0200