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M16C28 Datasheet, PDF (190/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES
M16C/28 Group (M16C/28, M16C/28B)
UARTi Transmit/receive Mode Register (i=0, 1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
Address
U0MR, U1MR 03A016, 03A816
After Reset
0016
Bit
Symbol
Bit Name
Function
SMD0
SMD1
SMD2
Serial I/O mode select bit
(2)
b2 b1 b0
0 0 0 : Serial I/O disabled
0 0 1 : Clock synchronous serial I/O mode
1 0 0 : UART mode transfer data 7 bits long
1 0 1 : UART mode transfer data 8 bits long
1 1 0 : UART mode transfer data 9 bits long
Do not set the value other than the above
CKDIR Internal/external clock
select bit
0 : Internal clock
1 : External clock (1)
STPS Stop bit length select bit 0 : One stop bit
1 : Two stop bits
PRY
PRYE
Odd/even parity select bit
Parity enable bit
Effective when PRYE = 1
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
(b7) Reserve bit
Set to "0"
NOTES:
1. Set the corresponding port direction bit for each CLKi pin to “0” (input mode).
2. To receive data, set the corresponding port direction bit for each RxDi pin to “0” (input mode).
UART2 Transmit/receive Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U2MR
Address
037816
After Reset
0016
Bit
Symbol
Bit Name
Function
SMD0
SMD1
SMD2
Serial I/O mode select bit
(2)
b2 b1 b0
0 0 0 : Serial I/O disabled
0 0 1 : Clock synchronous serial I/O mode
0 1 0 : I2C bus mode
(3)
1 0 0 : UART mode transfer data 7 bits long
1 0 1 : UART mode transfer data 8 bits long
1 1 0 : UART mode transfer data 9 bits long
Do not set the value other than the above
CKDIR Internal/external clock
select bit
0 : Internal clock
1 : External clock (1)
STPS Stop bit length select bit 0 : One stop bit
1 : Two stop bits
PRY
PRYE
Odd/even parity select bit
Parity enable bit
Effective when PRYE = 1
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
IOPOL TxD, RxD I/O polarity
reverse bit
0 : No reverse
1 : Reverse
NOTES:
1. Set the corresponding port direction bit for each CLK2 pin to “0” (input mode).
2. To receive data, set the corresponding port direction bit for each RxD2 pin to “0” (input mode).
3. Set the corresponding port direction bit for SCL 2 and SDA2 pins to “0” (input mode).
Figure 14.5 U0MR to U2MR Registers
14.Serial I/O
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Rev. 2.00 Jan. 31, 2007 page 170 of 385
REJ09B0047-0200