|
M16C28 Datasheet, PDF (382/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES | |||
|
◁ |
M16C/28 Group (M16C/28, M16C/28B)
20. Precautions
20.6.1.4 Timer A (Pulse Width Modulation Mode)
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
(i = 0 to 4) register, the TAi register, the ONSF register TA0TGL and TA0TGH bits and the TRGSR
register before setting the TAiS bit in the TABSR register to â1â (count starts).
Always make sure the TAiMR register, the ONSF register TA0TGL and TA0TGH bits and the
TRGSR register are modified while the TAiS bit remains â0â (count stops) regardless whether after
reset or not.
2. The IR bit is set to â1â when setting a timer operation mode with any of the following procedures:
⢠Select the PWM mode after reset.
⢠Change an operation mode from timer mode to PWM mode.
⢠Change an operation mode from event counter mode to PWM mode.
To use the timer Ai interrupt (interrupt request bit), set the IR bit to â0â by program after the above
listed changes have been made.
3. When setting TAiS register to â0â (count stop) during PWM pulse output, the following action occurs:
⢠Stop counting.
⢠When TAiOUT pin is output âHâ, output level is set to âLâ and the IR bit is set to â1â.
⢠When TAiOUT pin is output âLâ, both output level and the IR bit remains unchanged.
_____
4. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to â1â
_____
(three-phase output forcible cutoff by input on SD pin enabled), the TA1OUT, TA2OUT and TA4OUT
pins go to a high-impedance state.
Rev. 2.00 Jan. 31, 2007 page 362 of 385
REJ09B0047-0200
|
▷ |