M16C28 Datasheet, PDF (339/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
18. Flash Memory Version
18.8.4 Full Status Check
If an error occurs, the FMR06 to FMR07 bits in the FMR0 register are set to “1”, indicating a specific error.
Therefore, execution results can be comfirmed by verifying these status bits (full status check).
Table 18.7 lists errors and FMR0 register state. Figure 18.15 shows a flow chart of the full status check
and handling procedure for each error.
Table 18.7 Errors and FMR0 Register Status
FMR0 Register
(SRD register)
status
Error
Error occurrence condition
FMR07 FMR06
(SR5) (SR4)
1
1
Command
• An incorrect commands is written
sequence error • A value other than ‘xxD016’ or ‘xxFF16’ is written in the second
bus cycle of the block erase command ⁽¹⁾
• When the block erase command is executed on an protected block
• When the program command is executed on protected blocks
1
0
Erase error
• The block erase command is executed on an unprotected block
but the program operation is not successfully completed
0
1
Program error • The program command is executed on an unprotected block but
the program operation is not successfully completed
NOTE:
1. The flash memory enters read array mode by writing command code ‘xxFF16’ in the second bus cycle
of these commands. The command code written in the first bus cycle becomes invalid.
Rev. 2.00 Jan. 31, 2007 ^{page 319} of 385
REJ09B0047-0200