M16C28 Datasheet, PDF (336/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
18. Flash Memory Version
18.7.5 Block Erase
Auto erase operation (erase and verify) start in the specified block by writing ‘xx2016’ in the first bus cycle
and ‘xxD016’ to the highest-order even addresse of a block in the second bus cycle.
The FMR00 bit in the FMR0 register indicates whether the auto-erase operation has been completed.
The FMR00 bit is set to “0” (busy) during the auto-erase and “1” (ready) when the auto-erase operation is
completed.
When using the erase-suspend function in EW mode 0, verify whether a flash memory has entered erase
suspend mode, by the FMR46 bit in the FMR4 register. The FMR46 bit is set to “0” during auto-erase
operation and “1” when the auto-erase operation is completed (entering erase-suspend).
After the completion of an auto-erase operation, the FMR07 bit in the FMR0 register indicates whether or
not the auto-erase operation has been successfully completed. (Refer to 18.8.4 Full Status Check).
Also, each block can disable erasing. (Refer to Table 18.4).
Figure 18.13 shows a flow chart of the block erase command programming when not using the erase-
suspend function. Figure 18.14 shows a flow chart of the block erase command programming when
using an erase-suspend function.
In EW mode 1, do not execute this command on the block where the rewrite control program is allocated.
In EW mode 0, the microcomputer enters read status register mode as soon as the auto-erase operation
starts and the status register can be read. The SR7 bit in the status register is set to “0” at the same time
the auto-erase operation starts. This bit is set to “1” when the auto-erase operation is completed. The
microcomputer remains in read status register mode until the read array command is written.
When the erase error occurs, execute the clear status register command and block erase command at
leaset three times until an erase error does not occur.
Start
Write command code ‘xx2016’ ⁽¹⁾
Write ‘xxD016’ to the highest-order
block address ⁽¹⁾
NO
FMR00=1?
YES
Full status check ^(2,3)
Block erase completed
NOTES:
1. Write the command code and data at even address.
2. Refer to Figure 18.15.
3. Execute the clear status register command and block erase command at least 3 times
until an erase error is not generated when an erase error is generated.
Figure 18.13 Flow Chart of Block Erase Command (when not using erase suspend function)
Rev. 2.00 Jan. 31, 2007 ^{page 316} of 385
REJ09B0047-0200