M16C28 Datasheet, PDF (410/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

REVISION HISTORY
M16C/28 Group (M16C/28, M16C/28B) Hardware Manual
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Description
Summary
• Table 14.4 P64 Pin Functions Note 1 added
• Figure 14.10 Typical transmit/receive timings in clock synchronous serial I/
O mode Example of receive timing: figure modified
• 14.1.1.1 Counter Measure for Communication Error Occurs added
• Figure 14.14 Transfer Clock Output From Multiple Pins Note 2 added
• Figure 14.15 CTS/RTS Separate Function Usage Note 1 added
• Table 14.5 UART Mode Specifications Transfer clock modified
• Table 14.8 P64 Pin Functions in UART mode Note 1 added
• Figure 14.17 Receive Operation revised
• 14.1.2.1 Bit Rates added
• Table 14.9 Example of Bit Rates and Settings added
• 14.1.2.2 Counter Measure for Communication Error added
______ ______
• Figure 14.21 CTS/RTS Separate Function Note 1 added
• Table 14.10 I²C bus Mode Specifications Transfer clock modified
• Figure 14.23 Transfer to U2RB Register and Interrupt Timing modified
• Figure 14.24 Detection of Start and Stop Condition modified
• Table 14.14 STSPSEL Bit Functions modified
• Table 14.15 Special Mode 2 Specifications Transfer clock modified
• 14.1.5 Special Mode 3 (IEBus mode)(UART2) modified
• Table 14.18 SIM Mode Specifications Transfer clock modified
• Figure 14.31 Transmit and Receive Timing in SIM Mode revised
• Figure 14.36 S3C and S4C Registers, S3BRG and S4BRG Registers, and
S3TRR and S4TRR Registers Value after reset modified; S3C and S4C Regis-
ters: note 4 modified
• Table 14.20 SI/O3 and SI/O4 Mode Specifications Transfer clock modified
• Figure 14.38 Polarity of Transfer Clock modified
A/D Converter
• Note added
• Table 15.1 A/D Converter Performance Integral Nonlinearity Error modified
• Figure 15.4 ADCON0 to ADCON2 Registers ADCON2 register: b2-b1 function
modified
• Figure 15.5 TB2SC Register b6-b5 modified, reserved bit area modified
• Figure 15.4 ADCON0 to ADCON2 Registers in One-shot Mode ADCON2
register: b2-b1 function modified
• Figure 15.9 ADCON0 to ADCON2 Registers in Repeat Mode ADCON2 regis-
ter: b2-b1 function modified
• Figure 15.11 ADCON0 to ADCON2 Registers in Single Sweep Mode
ADCON2 register: b2-b1 function modified
C-5