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M16C28 Datasheet, PDF (328/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES | |||
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M16C/28 Group (M16C/28, M16C/28B)
18. Flash Memory Version
Flash Memory Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
FMR0
Address
01B716
After Reset
000000012
Bit Symbol
Bit Name
Function
RW
FMR00 RY/BY status flag
0: Busy (during writing or erasing)
1: Ready
RO
FMR01 CPU rewrite mode select bit (1) 0: Disables CPU rewrite mode
(Disables software command)
RW
1: Enables CPU rewrite mode
(Enables software commands)
FMR02
Block 0, 1 rewrite enable bit (2) Set write protection for user ROM area
(see Table 18.4)
RW
FMSTP Flash memory stop bit (3, 5)
0: Starts flash memory operation
1: Stops flash memory operation
(Enters low-power consumption state RW
and flash memory reset)
(b5-b4)
Reserved bit
Set to â0â
RW
FMR06 Program status flag
(4)
0: Successfully completed
1: Completion error
RO
FMR07 Erase status flag
(4)
0: Successfully completed
1: Completion error
RO
NOTES:
1. To set the FMR01 bit to â1â, write â1â to this bit immdediately after writing â0â. Do not generate an
interrupt or a DMA transfer between setting the bit to â0â and setting it to â1â. Set this bit while the
P85/NMI/SD pin is held âHâ when selecting the NMI function. Set by program in a space other than the
flash memory in EW mode 0. Set this bit to read alley mode and â0â
2. To set the FMR02 bit to â1â, write "1" to this bit immediately after writing "0" while the FMR01 bit is set
to â1â. Do not generate an interrupt or a DMA transfer between setting this bit to â0â and setting it to â1â.
3. Set this bit in a space other than the flash memory by program. When this bit is set to "1", access to
flash memory will be denied. To set this bit to "0" after setting it to "1", wait for 10 usec. or more after
setting it to "1". To read data from flash memory after setting this bit to "0", maintain tps wait time
before accessing flash memory.
4. This bit is set to â0â by executing the clear status command.
5. This bit is enabled when the FMR01 bit is set to â1â (CPU rewrite mode). If the FMR01 bit is set to 0",
this bit can be set to â1â by writing "1" to the FMR01 bit. However, the flash memory does not enter
low-power consumption status and it is not initialized.
Flash Memory Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
FMR1
Address
01B516
After Reset
000XXX0X 2
Bit Symbol
Bit Name
Function
RW
(b0) Reserved bit
When read, its content is indeterminate RO
FMR11 EW mode 1 select bit (1)
0: EW mode 0
1: EW mode 1
RW
(b3-b2) Reserved bit
When read, its content is indeterminate RO
(b4)
Nothing is assigned. When write, set to â0â.
When read, its contect is indeterminate.
(b5) Reserved bit
Set to â0â
RW
FMR16 Block 0 to 5 rewrite enable
bit (2)
Set write protection for user ROM
space(see Table 18.4)
RW
0: Disable
1: Enable
FMR17 Block A, B access wait bit (3) 0: PM17 enabled
RW
1: With wait state (1 wait)
NOTES:
1. To set the FMR11 bit to â1â, write "1" to this bit immediately after writing "0" while the FMR01 bit is set to
"1". Do not generate an interrupt or a DMA transfer between setting the bit to â0â and setting it to â1â.Set this
bit while the P85/NMI/SD pin is held âHâ when the NMI function is selected. If the FMR01 bit is set to â0â, the
FMR01 bit and FMR11 bit are both set to â0â.
2. To set the FMR16 bit to â1â, write "1" to this bit immediately after writing "0" while the FMR01 bit is set to
â1â. Do not generate an interrupt or a DMA transfer between setting the bit to â0â and setting it to â1â.
3. When rewriting more than 100 times, set this bit to â1â (with wait state). When the FMR17 bit is set to
â1â(with wait state), regardless of the PM17 bit setting, 1 wait state is inserted when accessing to blocks A
and B. The PM17 bit setting is enabled, regardless of the FMR17 bit setting, as to the access to other block
and the internal RAM.
Figure 18.7 FMR0 and FMR1 Registers
Rev. 2.00 Jan. 31, 2007 page 308 of 385
REJ09B0047-0200
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