M16C28 Datasheet, PDF (199/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
14. Serial I/O
14.1.1.1 Counter Measure for Communication Error Occurs
If a communication error occurs while transmitting or receiving in clock synchronous serial I/O mode,
follow the procedures below.
•Resetting the UiRB register (i=0 to 2)
(1) Set the RE bit in the UiC1 register to “0” (reception disabled)
(2) Set the SMD2 to SMD0 bits in the UiMR register to “0002” (Serial I/O disabled)
(3) Set the SMD2 to SMD0 bits in the UiMR register to “0012” (Clock synchronous serial I/O mode)
(4) Set the RE bit in the UiC1 register to “1” (reception enabled)
•Resetting the UiTB register (i=0 to 2)
(1) Set the SMD2 to SMD0 bits in the UiMR register to “0002” (Serial I/O disabled)
(2) Set the SMD2 to SMD0 bits in the UiMR register to “0012” (Clock synchronous serial I/O mode)
(3) “1” is written to TE bit in the UiC1 register (reception enabled), regardless to the TE bit.
Rev. 2.00 Jan. 31, 2007 ^{page 179} of 385
REJ09B0047-0200