M16C28 Datasheet, PDF (283/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
16. MULTI-MASTER I²C bus INTERFACE
16.4.5 Bit 7: I²C bus Interface Pin Input Level Select Bit (TISS)
The TISS bit selects the input level of the SCL and SDA pins for the multi-master I²C bus interface.
When the TISS bit is set to “1”, the P20 and P21 become the SMBus input level.
The signal of writing "1" to IHR bit
IHR bit
The reset signal to I²C-BUS interface circuit
2.5 VIIC cycles
Figure 16.10 The timing of reset to the I²C bus interface circuit
Rev. 2.00 Jan. 31, 2007 ^{page 263} of 385
REJ09B0047-0200