M16C28 Datasheet, PDF (420/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

REVISION HISTORY
M16C/28 Group (M16C/28, M16C/28B) Hardware Manual
Rev. Date
Page
163
166
175
183
191
193
201
207
212
216
217
220
222
251
253
274
275
282
284
294
296
297
302
306
307
308
310
Description
Summary
• Table 13.11 Pin Setting for Time Measurement and Waveform Generating
Functions Description of port direction modified
Serial I/O
• Figure 14.1 Block Diagram of UARTi Partially modified
• Table 14.1 Clock Synchronous Serial I/O Mode Specifications Note 2 modi-
fied
• Table 14.5 UART Mode Specifications Note 1 modified
• Table 14.10 I²C bus Mode Specifications Note 2 modified
• Table 14.11 Registers to Be Used and Settings in I²C bus Mode Note mark
partially deleted
• Table 14.15 Special Mode 2 Specifications Note 2 modified
• Table 14.18 SIM Mode Specifications Note 1 modified
• 14.2 SI/O3 and SI/O4 Note is added
• 14.2.3 Functions for Setting an SOUTi Initial Value modified
A/D Converter
• Table 15.1 A/D Converter Performance Note 2 partially added
• Table 15.2 A/D Conversion Frequency Select note 1 modified
• Figure 15.5 TB2SC Register Note 4 partially modified
Multi-Master I²C bus Interface
• Figure 16.1 Block Diagram of Multi-master I²C bus Interface S30 register
deleted, input from system clock select circuit modified
• Figure 16.3 S00 Register Register name in Note 1 modified
• 16.11 STOP Condition Generation Method Description partially added
• Table 16.8 Start/Stop Generation Timing Table Number of cycle partially
modified
Programmable I/O Ports
• 17.3 Pull-up Control Register 0 to 2 Description modified
• Figure 17.1 I/O Ports (1) A port P81 added
_______ _____
• Figure 17.12 Digital Debounce Filter P85, NMI, SD, and INPC17 are deleted
Flash Memory
• Table 18.1 Flash Memory Version Specifications Specification modified
• 18.1.1 Boot Mode Newly added
• 18.3.1 ROM Code Potect Function Description is modified
• 18.5.1 Flash Memory Control Register 0 (FMR0) Descriptions in FMR01 Bit
and FMR02 Bit modified
• 18.5.2 Flash Memory Control Register 1 (FMR1) Description in FMR16 Bit
and FMR17 Bit modified
• Figure 18.7 FMR1 Register Note 3 modified
• Figure 18.10 Setting and Resetting of EW Mode 1 note mark (3) added
C-15