M16C28 Datasheet, PDF (122/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
12. Timer
One-shot Start Flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
ONSF
Address
038216
After Reset
0016
Bit Symbol
Bit Name
Function
RW
TA0OS
TA1OS
TA2OS
TA3OS
TA4OS
Timer A0 one-shot start flag
Timer A1 one-shot start flag
Timer A2 one-shot start flag
Timer A3 one-shot start flag
Timer A4 one-shot start flag
The timer starts counting by setting RW
this bit to “1” while the TMOD1 to
TMOD0 bits of TAiMR register (i =
RW
0 to 4) = ‘102’ (= one-shot timer
RW
mode) and the MR2 bit of TAiMR
register = “0” (=TAiOS bit enabled). RW
When read, its content is “0”.
RW
TAZIE _{Z-phase input enable bit}
0 : Z-phase input disabled
1 : Z-phase input enabled
RW
TA0TGL _{Timer A0 event/trigger}
select bit
TA0TGH
b7 b6
0 0 : Input on TA0 IN is selected⁽¹⁾
RW
0 1 : TB2 overflow is selected ⁽²⁾
1 0 : TA4 overflow is selected ⁽²⁾
1 1 : TA1 overflow is selected ⁽²⁾
RW
NOTES:
1. Make sure the PD7_1 bit in the PD7 register is set to “0” (input mode).
2. Overflow or underflow
Trigger Select Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TRGSR
Address
038316
After Reset
0016
Bit Symbol
Bit Name
TA1TGL
TA1TGH
Timer A1 event/trigger
select bit
TA2TGL
TA2TGH
Timer A2 event/trigger
select bit
TA3TGL
TA3TGH
Timer A3 event/trigger
select bit
Function
RW
b1 b0
0 0 : Input on TA1IN is selected (1)
RW
0 1 : TB2 is selected (2)
1 0 : TA0 is selected (2)
1 1 : TA2 is selected (2)
RW
b3 b2
0 0 : Input on TA2IN is selected (1)
RW
0 1 : TB2 is selected (2)
1 0 : TA1 is selected (2)
1 1 : TA3 is selected (2)
RW
b5 b4
0 0 : Input on TA3IN is selected (1)
RW
0 1 : TB2 is selected (2)
1 0 : TA2 is selected (2)
RW
1 1 : TA4 is selected (2)
TA4TGL
TA4TGH
Timer A4 event/trigger
select bit
b7 b6
0 0 : Input on TA4IN is selected (1)
RW
0 1 : TB2 is selected (2)
1 0 : TA3 is selected (2)
1 1 : TA0 is selected (2)
RW
NOTES:
1. Make sure the port direction bits for the TA1 IN to TA4IN pins are set to “0” (= input mode).
2. Overflow or underflow
Clock Prescaler Reset Flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
CPSRF
Address
038116
After Reset
0XXXXXXX 2
Bit Symbol
Bit Name
Function
RW
Nothing is assigned. When write, set to “0”.
(b6-b0) ^{When read, the contents are indeterminate}
Setting this bit to “1” initializes the
CPSR Clock prescaler reset flag prescaler for the timekeeping clock. ^RW
(When read, the content is “0”).
Figure 12.6 ONSF Register, TRGSR Register, and CPSRF Register
Rev. 2.00 Jan. 31, 2007 ^{page 102} of 385
REJ09B0047-0200