M16C28 Datasheet, PDF (174/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
13. Timer S
(a) ^{When selecting the rising edge as a timer measurement trigger}
(The CTS1 to CTS0 bits in the G1TMCR register (j=0 to 7)=012)
fBT1
Base timer
INPC1j pin input or
trigger signal after
passing the digital
filter
n-2 n-1 n n+1 n+2 n+3 n+4 n+5 n+6 n+7 n+8 n+9 n+10 n+11 n+12 n+13 n+14
(2)
G1IRj bit ⁽¹⁾
G1TMj register
Delayed by 1 clock
n
n +5
write "0" by program if setting to "0"
n+8
NOTES :
1. Bits in the G1IR register.
2. Input pulse applied to the INPC1j pin requires 1.5 fBT1 clock cycles. or more.
(b) When selecting both edges as a timer measurement trigger
(The CTS1 to CTS0 bits=112)
fBT1
Base timer
n-2 n-1 n n+1 n+2 n+3 n+4 n+5 n+6 n+7 n+8 n+9 n+10 n+11 n+12 n+13 n+14
INPC1j pin input or
trigger signal after
passing the digital
filter
G1IRj bit ⁽¹⁾
G1TMj register ⁽²⁾
n
n+2
n+5
n+8
write "0" by program
if setting to "0"
n+12
NOTES :
1. Bits in the G1IR register.
2. No interrupt is generated if the microcomputer receives a trigger si.gnal when the G1IRj bit is set to "1".
However, the value of the G1TMj register is updated.
(c) Trigger signal when using digital filter
(The DF1 to DF0 bits in the G1TMCR register =102 or 112)
f1 or f2 or fBT1 ⁽¹⁾
INPC1j pin
Trigger signal after
passing the digital
filter
Signals, which do not match 3
times, are stripped off
Maximum 3.5 f1 or f2 or fBT1
clock cycles ⁽¹⁾
The trigger signal is delayed
by the digital filter
NOTES:
1. fBT1 when the DF1 to DF0 bits are set to "102", and f1 or f2 when set to "112".
Figure 13.20 Time Measurement Function (2)
Rev. 2.00 Jan. 31, 2007 ^{page 154} of 385
REJ09B0047-0200