M16C28 Datasheet, PDF (192/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
14.Serial I/O
UARTi Transmit/receive Control Register 1 (i=0, 1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U0C1, U1C1
Address
03A516,03AD16
After Reset
000000102
Bit
Symbol
Bit Name
Function
RW
TE
Transmit enable bit
0 : Transmission disabled
1 : Transmission enabled
RW
TI
Transmit buffer
empty flag
0 : Data present in UiTB register
1 : No data present in UiTB register
RO
RE Receive enable bit
0 : Reception disabled
1 : Reception enabled
RW
RI
Receive complete flag 0 : No data present in UiRB register
1 : Data present in UiRB register
RO
Nothing is assigned.
(b7-b4) When write, set “0”. When read, these contents are “0”.
UART2 Transmit/receive Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U2C1
Address
037D16
After Reset
000000102
Bit
Symbol
Bit Name
Function
RW
TE Transmit enable bit
0 : Transmission disabled
1 : Transmission enabled
RW
TI ^{Transmit buffer}
empty flag
0 : Data present in U2TB register
1 : No data present in U2TB register
RO
RE Receive enable bit
0 : Reception disabled
1 : Reception enabled
RW
RI Receive complete flag 0 : No data present in U2RB register
RO
1 : Data present in U2RB register
U2IRS UART2 transmit interrupt 0 : Transmit buffer empty (TI = 1)
RW
cause select bit
1 : Transmit is completed (TXEPT = 1)
U2RRM UART2 continuous
0 : Continuous receive mode disabled
receive mode enable bit 1 : Continuous receive mode enabled
RW
U2LCH Data logic select bit
0 : No reverse
1 : Reverse
RW
U2ERE Error signal output
enable bit
0 : Output disabled
1 : Output enabled
RW
Pin Assignment Control Register ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbpl
PACR
Address
025D16
After Reset
0016
Bit Symbol
Bit Name
PACR0 ^{Pin enabling bit}
PACR1
PACR2
Reserved bits
(b6-b3)
Function
RW
010 : 64 pin
RW
011 : 80 pin
All other values are reserved. Do
RW
not use.
RW
Nothing is assigned. When write,
set to “0”. When read, its
content is “0”.
UART1 pin remapping bit UART1 pins assigned to
U1MAP
0 : P67 to P64
RW
1 : P73 to P70
NOTES:
1. Set the PACR register by the next instruction after setting the PRC2 bit in the PRCR register to "1"(write
enable).
Figure 14.7 U0C1 to U2C1 Register, and PACR Register
Rev. 2.00 Jan. 31, 2007 ^{page 172} of 385
REJ09B0047-0200