M16C28 Datasheet, PDF (139/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
12. Timer
Count source
Measurement pulse ^{“H”}
“L”
Reload register counter
transfer timing
Timing at which counter
reaches “000016”
“1”
TBiS bit
“0”
Transfer
(indeterminate value)
Transfer
(measured value)
(1)
(1)
(2)
TBiIC register's
“1”
IR bit
“0”
Set to “0” upon accepting an interrupt request or by program
TBiMR register's
“1”
MR3 bit
“0”
The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
i = 0 to 2
NOTES:
1. Counter is initialized at completion of measurement.
2. Timer has overflowed.
3. This timing diagram is for the case where the MR1 to MR0 bits in the TBiMR register are “002” (measure the
interval from falling edge to falling edge of the measurement pulse).
Figure 12.21 Operation timing when measuring a pulse period
Count source
“H”
Measurement pulse
“L”
Reload register counter
transfer timing
Timing at which counter
reaches “000016”
Transfer
(indeterminate
value)
Transfer
(measured value)
Transfer
(measured
value)
Transfer
(measured value)
(1)
(1)
(1)
(1)
(1)
TBiS bit
“1”
“0”
TBiIC register's
“1”
IR bit
“0”
“1”
The MR3 bit in the
“0”
TBiMR register
Set to “0” upon accepting an interrupt request or by
program
The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
i = 0 to 2
NOTES:
1. Counter is initialized at completion of measurement.
2. Timer has overflowed.
3. This timing diagram is for the case where the MR1 to MR0 bits in the TBiMR register are “102” (measure the interval
from a falling edge to the next rising edge and the interval from a rising edge to the next falling edge of the
measurement pulse).
Figure 12.22 Operation timing when measuring a pulse width
Rev. 2.00 Jan. 31, 2007 ^{page 119} of 385
REJ09B0047-0200