M16C28 Datasheet, PDF (127/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
12. Timer
Timer Ai Mode Register (i=2 to 4)
(When using two-phase pulse signal processing)
b6 b5 b4 b3 b2 b1 b0
0 1 0 00 1
Symbol
TA2MR to TA4MR
Address
039816 to 039A16
After Reset
0016
Bit Symbol
Bit Name
Function
RW
TMOD0 _{Operation mode select bit} ^{b1 b0}
RW
TMOD1
0 1 : Event counter mode
RW
MR0
To use two-phase pulse signal processing, set this bit to “0”.
RW
MR1
To use two-phase pulse signal processing, set this bit to “0”.
RW
MR2
To use two-phase pulse signal processing, set this bit to “1”.
RW
MR3
To use two-phase pulse signal processing, set this bit to “0”.
RW
TCK0
TCK1
Count operation type
0 : Reload type
RW
select bit
1 : Free-run type
Two-phase pulse signal
processing operation
0 : Normal processing operation
RW
select bit ⁽¹⁾⁽²⁾
1 : Multiply-by-4 processing operation
NOTES:
1. TCK1 bit is valid for timer A3 mode register. No matter how this bit is set, timers A2 and A4 always operate in
normal processing mode and x4 processing mode, respectively.
2. If two-phase pulse signal processing is desired, following register settings are required:
• Set the TAiP bit in the UDF register to “1” (two-phase pulse signal processing function enabled).
• Set the TAiTGH and TAiTGL bits in the TRGSR register to ‘002’ (TAiIN pin input).
• Set the port direction bits for TAiIN and TAiOUT to “0” (input mode).
Figure 12.9 TA2MR to TA4MR Registers in Event Counter Mode (when using two-phase pulse
signal processing with timer A2, A3 or A4)
Rev. 2.00 Jan. 31, 2007 ^{page 107} of 385
REJ09B0047-0200