M16C28 Datasheet, PDF (418/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

REVISION HISTORY
M16C/28 Group (M16C/28, M16C/28B) Hardware Manual
Rev. Date
1.11 Apr., 06
2.00 Jan., 07
Page
382
2, 3
19 to 21
43
47
54
58
59
60
-
1
2, 3
6
7
8
10
11, 12
20, 21
35
37
42
43
49
51
Description
Summary
module, and CRC calculation in M16C/28 (Normal-ver.) changed
• Appendix 2.3 Difference between M16C/28 and M16C/29 Groups (T-ver./V-
ver.) Information of CAN module changed
Overview
• Table 1.1 and Table 1.2 Performance Outline of M16C/28 Group Information
about option deleted
• Table 1.10 Pin Description Description partially modified
Clock Generation Circuit
• Figure 7.1 Clock Generation Circuit Figure partially modified
• Figure 7.6 PCLKR Register and PM2 Register NOTE 4. partially modified
• 7.6.1 Normal Operation Mode Information partially modified
• Figure 7.11 State Transition to Stop Mode and Wait Mode Figure partially
modified
• Figure 7.12 State Transition in Normal Mode Figure partially modified
• Table 7.5 Allowed Transition and Setting Table partially modified
M16C/28B added, word standardized: I²C bus mode, CPU clock
Overview
• 1.1 Features Description modified
• Tables 1.1 and 1.2 Performance Outline of M16C/28 Group Note 4 condition
for use of M16C/28B at f(BCLK) = 24 MHz added, performance description modi-
fied and some added
• Table 1.3 Product List-M16C/28 Product code partially deleted
• Table 1.4 Product List-M16C/28B Normal-ver. newly added
• Figure 1.3 Product Numbering System modified
• Tables 1.5 to 1.8 Product Code Partially modified
• Figure 1.5 Pin Assignment (Top View) of 85-pin Package Note 4 added
• Table 1.7 Pin Characteristics for 85-Pin Package Field name partially modi-
fied
• Table 1.10 Pin Description Description about I/O Ports modified
Reset
• Figure 5.4 Voltage Detection Circuit Block Partially modified
• Figure 5.6 D4INT Register Note 5 (3) and (4) are added
Processor Mode
• Figure 6.2 PM2 Register added
• Figure 6.3 Bus Block added
Clock Generation Circuit
• Figure 7.6 PM2 Register Note 5 Description partially added, notes 4 and 6
modified
• Figure 7.8 Examples of Main Clock Connection Circuit Note 2 added
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