M16C28 Datasheet, PDF (255/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
15. A/D Converter
A/D Trigger Control Register ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0 01
Symbol
ADTRGCON
Address
03D216
Bit Symbol
Bit Name
SSE
A/D Operation Mode
Select Bit 2
DTE
HPTRG0
A/D Operation Mode
Select Bit 3
AN0 Trigger Select Bit
After Reset
0016
Function
RW
1 : Simultaneous sample sweep mode
or delayed trigger mode 0, 1
RW
0 : Any mode other than delayed trigger
mode 0,1
RW
Refer to Table 15.9
RW
HPTRG1 ^{AN1 Trigger Select Bit}
Set to "0" in simultaneous sample
RW
sweep mode
(b7-b4)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
NOTES:
1. If ADTRGCON register is rewritten during A/D conversion, the conversion result will be indeterminate.
Figure 15.18 ADTRGCON Register in Simultaneous Sample Sweep Mode
Table 15.9 Trigger Select Bit Setting in Simultaneous Sample Sweep Mode
TRG
0
1
TRG1
-
-
HPTRG0
TRIGGER
-
Software trigger
1
Timer B0 underflow ⁽¹⁾
1
0
0
ADTRG
1
1
Timer B2 or Timer B2 interrupt generation frequency setting
0
counter underflow ⁽²⁾
NOTES:
1. A count can be started for Timer B2, Timer B2 interrupt generation frequency
setting counter underflow or the INT5 pin falling edge as count start
conditions of Timer B0.
2. Select Timer B2 or Timer B2 interrupt generation frequency setting counter
using the TB2SEL bit in the TB2SC register.
Rev. 2.00 Jan. 31, 2007 ^{page 235} of 385
REJ09B0047-0200