M16C28 Datasheet, PDF (167/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
13. Timer S
fBT1
f1 or f2
Two-phase pulse input
BCK1 to BCK0
11
(n+1) divider
10
(Note 1)
Base timer
b14 b15
Overflow signal
BTS bit in G1BCR1 register
Matched with G1BTRR
Matched with G1PO0 register
Input "L" to INT1 pin
RST4
RST1
RST2
Base timer reset
0
1
IT
Base timer
overflow request
NOTES:
1. Divider is reset when the BTS bit is set to "0".
IT, RST4, BCK1 to BCK0 : Bits in the G1BCR0 register
RST2 to RST1: Bits in the G1BCR1 register
Figure 13.11 Base Timer Block Diagram
Table 13.3 Base Timer Associated Register Settings (Time Measurement Function, Waveform
Generation Function, Communication Function)
Register
Bit
Function
G1BCR0 BCK1 to BCK0 Select a count source
RST4
Select base timer reset timing
IT
Select the base timer overflow
G1BCR1 RST2 to RST1 Select base timer reset timing
BTS
Used to start the base timer
UD1 to UD0
Select how to count
G1BT
-
Read or write base timer value
G1DV
-
Divide ratio of a count source
Set the following registers to set the RST1 bit to "1" (base timer reset by matching the base timer with the G1PO0 register)
G1POCR0 MOD1 to MOD0 Set to "002" (single-phase waveform output mode)
G1PO0
G1FS
G1FE
-
FSC0
IFE0
Set reset cycle
Set to "0" (waveform generating function)
Set to "1" (channel operation start)
Rev. 2.00 Jan. 31, 2007 ^{page 147} of 385
REJ09B0047-0200