M16C28 Datasheet, PDF (293/423 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES

M16C/28 Group (M16C/28, M16C/28B)
16. MULTI-MASTER I²C bus INTERFACE
16.9 START Condition Generation Method
Set the MST bit, TRX bit and BB flags in the S10 register to "1" and set the PIN bit and 4 low-order bits in the
S10 register to "0" simultaneously, to enter START condition standby mode, when the ES0 bit in the S1D0
register is set to “1” (I²C bus interface enabled) and the BB flag is set to “0” (bus free). When the slave
address is written to the S00 register next, START condition is generated and the bit counter is reset to
"0002" and 1-byte SCL signal is output. The START condition generation timing varies between standard
clock mode and high-speed clock mode. See Figure 16.16 and Table 16.8.
Interrupt disable
No
BB=0?
Yes
S10=E016
Start condition standby status setting
S00=Data
Start condition trigger generation
*Data=Slave address data
Interrupt enable
Figure 16.14 Start condition generation flow chart
Rev. 2.00 Jan. 31, 2007 ^{page 273} of 385
REJ09B0047-0200