MC9S08RG60 Datasheet, PDF (95/232 Pages) Motorola, Inc – Microcontrollers

7.4 Pin Description
SoC Guide — MC9S08RG60/D Rev 1.10
The IRO pin is the only pin associated with the CMT. The pin is driven by the transmitter output when the
MCGEN bit in the CMTMSC register and the IROPEN bit in the CMTOC register are set. If the MCGEN
bit is clear and the IROPEN bit is set, the pin is driven by the IROL bit in the CMTOC register. This
enables user software to directly control the state of the IRO pin by writing to the IROL bit. If the IROPEN
bit is clear, the pin is disabled and is not driven by the CMT module. This is so the CMT can be configured
as a modulo timer for generating periodic interrupts without causing pin activity.
7.5 Functional Description
The CMT module consists of a carrier generator, a modulator, a transmitter output, and control registers.
The block diagram is shown in Figure 7-2. When operating in time mode, the user independently defines
the high and low times of the carrier signal to determine both period and duty cycle. The carrier generator
resolution is 125 ns when operating with an 8 MHz internal bus frequency and the CMTDIV1 and
CMTDIV0 bits in the CMTMSC register are both equal to 0. The carrier generator can generate signals
with periods between 250 ns (4 MHz) and 127.5 µs (7.84 kHz) in steps of 125 ns. See Table 7-1.
Table 7-1 Clock Divide
Bus
Clock
(MHz)
8
8
8
8
CMTDIV1:CMTDIV0
0:0
0:1
1:0
1:1
Carrier
Generator
Resolution
(µs)
0.125
0.25
0.5
1.0
Min Carrier
Generator
Period
(µs)
0.25
0.5
1.0
2.0
Min
Modulator
Period
(µs)
1.0
2.0
4.0
8.0
The possible duty cycle options will depend upon the number of counts required to complete the carrier
period. For example, a 1.6 MHz signal has a period of 625 ns and will therefore require 5 × 125 ns counts
to generate. These counts may be split between high and low times, so the duty cycles available will be
20 percent (one high, four low), 40 percent (two high, three low), 60 percent (three high, two low) and
80 percent (four high, one low).
For lower frequency signals with larger periods, higher resolution (as a percentage of the total period) duty
cycles are possible.
When the BASE bit in the CMT modulator status and control register (CMTMSC) is set, the carrier output
(f_CG) to the modulator is held high continuously to allow for the generation of baseband protocols.
A third mode allows the carrier generator to alternate between two sets of high and low times. When
operating in FSK mode, the generator will toggle between the two sets when instructed by the modulator,
allowing the user to dynamically switch between two carrier frequencies without CPU intervention.
Freescale Semiconductor
MC9S08RC/RD/RE/RG
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