MC9S08RG60 Datasheet, PDF (162/232 Pages) Motorola, Inc – Microcontrollers

Serial Peripheral Interface (SPI) Module
12.1 Features
Features of the SPI module include:
• Master or slave mode operation
• Full-duplex or single-wire bidirectional option
• Programmable transmit bit rate
• Double-buffered transmit and receive
• Serial clock phase and polarity options
• Slave select output
• Selectable MSB-first or LSB-first shifting
12.2 Block Diagrams
This section includes block diagrams showing SPI system connections, the internal organization of the SPI
module, and the SPI clock dividers that control the master mode bit rate.
12.2.1 SPI System Block Diagram
Figure 12-2 shows the SPI modules of two MCUs connected in a master-slave arrangement. The master
device initiates all SPI data transfers. During a transfer, the master shifts data out (on the MOSI1 pin) to
the slave while simultaneously shifting data in (on the MISO1 pin) from the slave. The transfer effectively
exchanges the data that was in the SPI shift registers of the two SPI systems. The SPSCK1 signal is a clock
output from the master and an input to the slave. The slave device must be selected by a low level on the
slave select input (SS1 pin). In this system, the master device has configured its SS1 pin as an optional
slave select output.
MASTER
SPI SHIFTER
76543210
MOSI1
MISO1
MOSI1
MISO1
SLAVE
SPI SHIFTER
76543210
CLOCK
GENERATOR
SPSCK1
SPSCK1
SS1
SS1
Figure 12-2 SPI System Connections
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MC9S08RC/RD/RE/RG
Freescale Semiconductor