MC9S08RG60 Datasheet, PDF (74/232 Pages) Motorola, Inc – Microcontrollers

Central Processor Unit (CPU)
6.2 Features
Features of the HCS08 CPU include:
• Object code fully upward-compatible with M68HC05 and M68HC08 Families
• All registers and memory are mapped to a single 64-Kbyte address space
• 16-bit stack pointer (any size stack anywhere in 64-Kbyte address space)
• 16-bit index register (H:X) with powerful indexed addressing modes
• 8-bit accumulator (A)
• Many instructions treat X as a second general-purpose 8-bit register
• Seven addressing modes:
– Inherent — Operands in internal registers
– Relative — 8-bit signed offset to branch destination
– Immediate — Operand in next object code byte(s)
– Direct — Operand in memory at $0000–$00FF
– Extended — Operand anywhere in 64-Kbyte address space
– Indexed relative to H:X — Five submodes including auto increment
– Indexed relative to SP — Improves C efficiency dramatically
• Memory-to-memory data move instructions with four address mode combinations
• Overflow, half-carry, negative, zero, and carry condition codes support conditional branching on
the results of signed, unsigned, and binary-coded decimal (BCD) operations
• Efficient bit manipulation instructions
• Fast 8-bit by 8-bit multiply and 16-bit by 8-bit divide instructions
• STOP and WAIT instructions to invoke low-power operating modes
6.3 Programmer’s Model and CPU Registers
Figure 6-1 shows the five CPU registers. CPU registers are not part of the memory map.
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MC9S08RC/RD/RE/RG
Freescale Semiconductor