MC9S08RG60 Datasheet, PDF (148/232 Pages) Motorola, Inc – Microcontrollers

Serial Communications Interface (SCI) Module
INTERNAL BUS
16 × BAUD
RATE CLOCK
DIVIDE
BY 16
FROM RxD1 PIN
M
DATA RECOVERY
(READ-ONLY)
SCID – Rx BUFFER
11-BIT RECEIVE SHIFT REGISTER
H876543210L
SHIFT DIRECTION
LOOPS
RSRC
SINGLE-WIRE
LOOP CONTROL
FROM
TRANSMITTER
WAKE
ILT
WAKEUP
LOGIC
RWU
PE
PARITY
PT
CHECKING
RDRF
RIE
IDLE
ILIE
OR
ORIE
FE
FEIE
NF
NEIE
PF
PEIE
Figure 11-4 SCI Receiver Block Diagram
Rx INTERRUPT
REQUEST
ERROR INTERRUPT
REQUEST
The receiver is enabled by setting the RE bit in SCI1C2. Character frames consist of a start bit of logic 0,
eight (or nine) data bits (LSB first), and a stop bit of logic 1. For information about 9-bit data mode, refer
to 11.7.1 8- and 9-Bit Data Modes. For the remainder of this discussion, we assume the SCI is configured
for normal 8-bit data mode.
148
MC9S08RC/RD/RE/RG
Freescale Semiconductor